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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tse/GanesanW92>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ravi_Ganesan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shlomo_Weiss>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F32.120318>
foaf:homepage <https://doi.org/10.1109/32.120318>
dc:identifier DBLP journals/tse/GanesanW92 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F32.120318 (xsd:string)
dcterms:issued 1992 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tse>
rdfs:label Scalar Memory References in Pipelined Multiprocessors: A Performance Study. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ravi_Ganesan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shlomo_Weiss>
swrc:number 1 (xsd:string)
swrc:pages 78-86 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tse/GanesanW92/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tse/GanesanW92>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tse/tse18.html#GanesanW92>
rdfs:seeAlso <https://doi.org/10.1109/32.120318>
dc:subject scalar memory references; pipelined multiprocessors; pipelined computers; high memory bandwidth; memory bank; memory cycle; processor cycle time; bank reservation time; bank busy time; Markov models; state space; Markov chain; transition probabilities; simulation results; Markov processes; parallel machines; performance evaluation; pipeline processing; probability; storage management (xsd:string)
dc:title Scalar Memory References in Pipelined Multiprocessors: A Performance Study. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 18 (xsd:string)