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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/AlidinaMDGP94>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abhijit_Ghosh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_Monteiro_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marios_C._Papaefthymiou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mazhar_Alidina>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Srinivas_Devadas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F92.335011>
foaf:homepage <https://doi.org/10.1109/92.335011>
dc:identifier DBLP journals/tvlsi/AlidinaMDGP94 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F92.335011 (xsd:string)
dcterms:issued 1994 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Precomputation-based sequential logic optimization for low power. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abhijit_Ghosh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_Monteiro_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marios_C._Papaefthymiou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mazhar_Alidina>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Srinivas_Devadas>
swrc:number 4 (xsd:string)
swrc:pages 426-436 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/AlidinaMDGP94/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/AlidinaMDGP94>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi2.html#AlidinaMDGP94>
rdfs:seeAlso <https://doi.org/10.1109/92.335011>
dc:title Precomputation-based sequential logic optimization for low power. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 2 (xsd:string)