A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tvlsi/BashirullahLCE04
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/BashirullahLCE04
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Dale_Edwards
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ralph_K._Cavin_III
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rizwan_Bashirullah
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Wentai_Liu
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2004.831481
>
foaf:
homepage
<
https://doi.org/10.1109/TVLSI.2004.831481
>
dc:
identifier
DBLP journals/tvlsi/BashirullahLCE04
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FTVLSI.2004.831481
(xsd:string)
dcterms:
issued
2004
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tvlsi
>
rdfs:
label
A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Dale_Edwards
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ralph_K._Cavin_III
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rizwan_Bashirullah
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Wentai_Liu
>
swrc:
number
8
(xsd:string)
swrc:
pages
876-880
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/BashirullahLCE04/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tvlsi/BashirullahLCE04
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi12.html#BashirullahLCE04
>
rdfs:
seeAlso
<
https://doi.org/10.1109/TVLSI.2004.831481
>
dc:
title
A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
12
(xsd:string)