System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tvlsi/ConteMST00
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/ConteMST00
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kishore_N._Menezes
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mark_C._Toburen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sumedh_W._Sathaye
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Thomas_M._Conte
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2F92.831433
>
foaf:
homepage
<
https://doi.org/10.1109/92.831433
>
dc:
identifier
DBLP journals/tvlsi/ConteMST00
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2F92.831433
(xsd:string)
dcterms:
issued
2000
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tvlsi
>
rdfs:
label
System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kishore_N._Menezes
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mark_C._Toburen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sumedh_W._Sathaye
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Thomas_M._Conte
>
swrc:
number
2
(xsd:string)
swrc:
pages
129-137
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/ConteMST00/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tvlsi/ConteMST00
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi8.html#ConteMST00
>
rdfs:
seeAlso
<
https://doi.org/10.1109/92.831433
>
dc:
title
System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
8
(xsd:string)