Scalable All-Analog LDOs With Reduced Input Offset Variability Using Digital Synthesis Flow in 65-nm CMOS. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/GuptaLC24>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Benton_H._Calhoun>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Shourya_Gupta>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Shuo_Li_0008>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2023.3328978>
foaf:homepage	<https://doi.org/10.1109/TVLSI.2023.3328978>
dc:identifier	DBLP journals/tvlsi/GuptaLC24 (xsd:string)
dc:identifier	DOI doi.org%2F10.1109%2FTVLSI.2023.3328978 (xsd:string)
dcterms:issued	2024 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label	Scalable All-Analog LDOs With Reduced Input Offset Variability Using Digital Synthesis Flow in 65-nm CMOS. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Benton_H._Calhoun>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Shourya_Gupta>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Shuo_Li_0008>
swrc:month	January (xsd:string)
swrc:number	1 (xsd:string)
swrc:pages	190-194 (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/GuptaLC24/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/journals/tvlsi/GuptaLC24>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi32.html#GuptaLC24>
rdfs:seeAlso	<https://doi.org/10.1109/TVLSI.2023.3328978>
dc:title	Scalable All-Analog LDOs With Reduced Input Offset Variability Using Digital Synthesis Flow in 65-nm CMOS. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:Article
rdf:type	foaf:Document
swrc:volume	32 (xsd:string)