Techniques for accurate performance evaluation in architecture exploration. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/George_Hadjiyiannis>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Srinivas_Devadas>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2003.812290>
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dc:identifier	DBLP journals/tvlsi/HadjiyiannisD03 (xsd:string)
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dcterms:issued	2003 (xsd:gYear)
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rdfs:label	Techniques for accurate performance evaluation in architecture exploration. (xsd:string)
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swrc:pages	601-615 (xsd:string)
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dc:title	Techniques for accurate performance evaluation in architecture exploration. (xsd:string)
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