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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/JoseKSTW24>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chua-Chin_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lean_Karlo_S._Tolentino>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oliver_Lexter_July_A._Jose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ralph_Gerard_B._Sangalang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Venkata_Naveen_Kolakaluri>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2024.3367300>
foaf:homepage <https://doi.org/10.1109/TVLSI.2024.3367300>
dc:identifier DBLP journals/tvlsi/JoseKSTW24 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2024.3367300 (xsd:string)
dcterms:issued 2024 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label A 6.25-MHz 3.4-mW Single Clock DPWM Technique Using Matrix Shift Array. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chua-Chin_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lean_Karlo_S._Tolentino>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oliver_Lexter_July_A._Jose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ralph_Gerard_B._Sangalang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Venkata_Naveen_Kolakaluri>
swrc:month May (xsd:string)
swrc:number 5 (xsd:string)
swrc:pages 972-976 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/JoseKSTW24/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/JoseKSTW24>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi32.html#JoseKSTW24>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2024.3367300>
dc:title A 6.25-MHz 3.4-mW Single Clock DPWM Technique Using Matrix Shift Array. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 32 (xsd:string)