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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/KarypisAKS99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_Karypis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajat_Aggarwal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shashi_Shekhar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vipin_Kumar_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F92.748202>
foaf:homepage <https://doi.org/10.1109/92.748202>
dc:identifier DBLP journals/tvlsi/KarypisAKS99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F92.748202 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Multilevel hypergraph partitioning: applications in VLSI domain. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_Karypis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajat_Aggarwal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shashi_Shekhar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vipin_Kumar_0001>
swrc:number 1 (xsd:string)
swrc:pages 69-79 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/KarypisAKS99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/KarypisAKS99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi7.html#KarypisAKS99>
rdfs:seeAlso <https://doi.org/10.1109/92.748202>
dc:title Multilevel hypergraph partitioning: applications in VLSI domain. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 7 (xsd:string)