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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/LinCHSCL21a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hao-Yuan_Hsieh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jai-Ming_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Juin-Ming_Lu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei-Yi_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ya-Ting_Shyu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yeong-Jar_Chang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2021.3100343>
foaf:homepage <https://doi.org/10.1109/TVLSI.2021.3100343>
dc:identifier DBLP journals/tvlsi/LinCHSCL21a (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2021.3100343 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hao-Yuan_Hsieh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jai-Ming_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Juin-Ming_Lu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei-Yi_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ya-Ting_Shyu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yeong-Jar_Chang>
swrc:number 9 (xsd:string)
swrc:pages 1652-1664 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/LinCHSCL21a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/LinCHSCL21a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi29.html#LinCHSCL21a>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2021.3100343>
dc:title Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 29 (xsd:string)