Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tvlsi/LinYV08
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https://dblp.l3s.de/d2r/resource/authors/Lan-Da_Van
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https://dblp.l3s.de/d2r/resource/authors/Yuan-Chu_Yu
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http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2008.2000676
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https://dblp.l3s.de/d2r/resource/journals/tvlsi
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Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor.
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https://dblp.l3s.de/d2r/resource/authors/Chin-Teng_Lin
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maker
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https://dblp.l3s.de/d2r/resource/authors/Lan-Da_Van
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foaf:
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swrc:
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8
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swrc:
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1058-1071
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Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor.
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