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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/PengCKLWS14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bo-Wei_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chih-Hsiang_Peng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jhing-Fa_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nai-Sheng_Shih>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Po-Chuan_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ta-Wen_Kuan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2013.2278706>
foaf:homepage <https://doi.org/10.1109/TVLSI.2013.2278706>
dc:identifier DBLP journals/tvlsi/PengCKLWS14 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2013.2278706 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label REC-STA: Reconfigurable and Efficient Chip Design With SMO-Based Training Accelerator. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bo-Wei_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chih-Hsiang_Peng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jhing-Fa_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nai-Sheng_Shih>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Po-Chuan_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ta-Wen_Kuan>
swrc:number 8 (xsd:string)
swrc:pages 1791-1802 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/PengCKLWS14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/PengCKLWS14>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#PengCKLWS14>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2013.2278706>
dc:title REC-STA: Reconfigurable and Efficient Chip Design With SMO-Based Training Accelerator. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 22 (xsd:string)