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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/ShiehCWL08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hao-Hsuan_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun-Hong_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ming-Der_Shieh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wen-Ching_Lin>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2008.2000524>
foaf:homepage <https://doi.org/10.1109/TVLSI.2008.2000524>
dc:identifier DBLP journals/tvlsi/ShiehCWL08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2008.2000524 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hao-Hsuan_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun-Hong_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ming-Der_Shieh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wen-Ching_Lin>
swrc:number 9 (xsd:string)
swrc:pages 1151-1161 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/ShiehCWL08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/ShiehCWL08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi16.html#ShiehCWL08>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2008.2000524>
dc:title A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 16 (xsd:string)