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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/SinghISF06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hideo_Fujiwara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kewal_K._Saluja>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michiko_Inoue>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Virendra_Singh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2006.886412>
foaf:homepage <https://doi.org/10.1109/TVLSI.2006.886412>
dc:identifier DBLP journals/tvlsi/SinghISF06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2006.886412 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Instruction-Based Self-Testing of Delay Faults in Pipelined Processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hideo_Fujiwara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kewal_K._Saluja>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michiko_Inoue>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Virendra_Singh>
swrc:number 11 (xsd:string)
swrc:pages 1203-1215 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/SinghISF06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/SinghISF06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi14.html#SinghISF06>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2006.886412>
dc:title Instruction-Based Self-Testing of Delay Faults in Pipelined Processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 14 (xsd:string)