A 230-MHz half-bit level pipelined multiplier using true single-phase clocking.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tvlsi/SomasekharV93
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1993
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A 230-MHz half-bit level pipelined multiplier using true single-phase clocking.
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415-422
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title
A 230-MHz half-bit level pipelined multiplier using true single-phase clocking.
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