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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/SongWHLCL17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Huawei_Li_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lili_Song>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiaowei_Li_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ying_Wang_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yinhe_Han_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuanqing_Cheng>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2016.2644279>
foaf:homepage <https://doi.org/10.1109/TVLSI.2016.2644279>
dc:identifier DBLP journals/tvlsi/SongWHLCL17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2016.2644279 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Huawei_Li_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lili_Song>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiaowei_Li_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ying_Wang_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yinhe_Han_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuanqing_Cheng>
swrc:number 4 (xsd:string)
swrc:pages 1285-1296 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/SongWHLCL17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/SongWHLCL17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi25.html#SongWHLCL17>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2016.2644279>
dc:title STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 25 (xsd:string)