Sense: Model-Hardware Codesign for Accelerating Sparse CNNs on Systolic Arrays.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tvlsi/SunLZSCK23
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Sense: Model-Hardware Codesign for Accelerating Sparse CNNs on Systolic Arrays.
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Sense: Model-Hardware Codesign for Accelerating Sparse CNNs on Systolic Arrays.
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