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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/TsaiWXVI08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Feng_Wang_0004>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mary_Jane_Irwin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Narayanan_Vijaykrishnan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuan_Xie_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuh-Fang_Tsai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2007.915429>
foaf:homepage <https://doi.org/10.1109/TVLSI.2007.915429>
dc:identifier DBLP journals/tvlsi/TsaiWXVI08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2007.915429 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Design Space Exploration for 3-D Cache. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Feng_Wang_0004>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mary_Jane_Irwin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Narayanan_Vijaykrishnan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuan_Xie_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuh-Fang_Tsai>
swrc:number 4 (xsd:string)
swrc:pages 444-455 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/TsaiWXVI08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/TsaiWXVI08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi16.html#TsaiWXVI08>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2007.915429>
dc:title Design Space Exploration for 3-D Cache. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 16 (xsd:string)