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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/WangMPCD05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Antonis_Papanikolaou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francky_Catthoor>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hua_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Miguel_Miranda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wim_Dehaene>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2005.859480>
foaf:homepage <https://doi.org/10.1109/TVLSI.2005.859480>
dc:identifier DBLP journals/tvlsi/WangMPCD05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2005.859480 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Antonis_Papanikolaou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francky_Catthoor>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hua_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Miguel_Miranda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wim_Dehaene>
swrc:number 10 (xsd:string)
swrc:pages 1127-1135 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/WangMPCD05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/WangMPCD05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi13.html#WangMPCD05>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2005.859480>
dc:title Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 13 (xsd:string)