[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/WuCCF03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chak-Chung_Cheung>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_Ihsin_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hongbing_Fan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Liang_Wu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTVLSI.2003.812369>
foaf:homepage <https://doi.org/10.1109/TVLSI.2003.812369>
dc:identifier DBLP journals/tvlsi/WuCCF03 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTVLSI.2003.812369 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Further improve circuit partitioning using GBAW logic perturbation techniques. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chak-Chung_Cheung>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_Ihsin_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hongbing_Fan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Liang_Wu>
swrc:number 3 (xsd:string)
swrc:pages 451-460 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/WuCCF03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/WuCCF03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi11.html#WuCCF03>
rdfs:seeAlso <https://doi.org/10.1109/TVLSI.2003.812369>
dc:title Further improve circuit partitioning using GBAW logic perturbation techniques. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 11 (xsd:string)