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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tvlsi/YeeS00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Carl_Sechen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gin_Yee>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F92.863622>
foaf:homepage <https://doi.org/10.1109/92.863622>
dc:identifier DBLP journals/tvlsi/YeeS00 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F92.863622 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tvlsi>
rdfs:label Clock-delayed domino for dynamic circuit design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Carl_Sechen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gin_Yee>
swrc:number 4 (xsd:string)
swrc:pages 425-430 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tvlsi/YeeS00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tvlsi/YeeS00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi8.html#YeeS00>
rdfs:seeAlso <https://doi.org/10.1109/92.863622>
dc:title Clock-delayed domino for dynamic circuit design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 8 (xsd:string)