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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/vc/Ikedo96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsuneo_Ikedo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2FBF01782236>
foaf:homepage <https://doi.org/10.1007/BF01782236>
dc:identifier DBLP journals/vc/Ikedo96 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2FBF01782236 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/vc>
rdfs:label Design and performance evaluation of a pixel cache implemented within application- specific integrated circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsuneo_Ikedo>
swrc:number 5 (xsd:string)
swrc:pages 215-233 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/vc/Ikedo96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/vc/Ikedo96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/vc/vc12.html#Ikedo96>
rdfs:seeAlso <https://doi.org/10.1007/BF01782236>
dc:subject Graphics processor, Multimedia systems, HDTV, Polygon rendering (xsd:string)
dc:title Design and performance evaluation of a pixel cache implemented within application- specific integrated circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 12 (xsd:string)