A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsi/YenYLH13
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A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design.
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A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design.
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