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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/BellowsH01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Brad_L._Hutchings>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peter_Bellows>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FA%3A1008107104782>
foaf:homepage <https://doi.org/10.1023/A:1008107104782>
dc:identifier DBLP journals/vlsisp/BellowsH01 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FA%3A1008107104782 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/vlsisp>
rdfs:label Designing Run-Time Reconfigurable Systems with JHDL. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Brad_L._Hutchings>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peter_Bellows>
swrc:number 1-2 (xsd:string)
swrc:pages 29-45 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/BellowsH01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/vlsisp/BellowsH01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp28.html#BellowsH01>
rdfs:seeAlso <https://doi.org/10.1023/A:1008107104782>
dc:subject FPGAs; CAD; configurable computing; image processing (xsd:string)
dc:title Designing Run-Time Reconfigurable Systems with JHDL. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 28 (xsd:string)