Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsisp/ChangCS09
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2009
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Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit.
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SIMD processor; On-chip memory; Multi-bank memory; Vectorizing compiler; Data allocation
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Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit.
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