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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/HongCKH04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sangjin_Hong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shu-Shin_Chin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Suhwan_Kim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei_Hwang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FB%3AVLSI.0000040423.95673.2d>
foaf:homepage <https://doi.org/10.1023/B:VLSI.0000040423.95673.2d>
dc:identifier DBLP journals/vlsisp/HongCKH04 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FB%3AVLSI.0000040423.95673.2d (xsd:string)
dcterms:issued 2004 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/vlsisp>
rdfs:label Power Reduction Technique in Coefficient Multiplications Through Multiplier Characterization. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sangjin_Hong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shu-Shin_Chin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Suhwan_Kim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei_Hwang>
swrc:number 2 (xsd:string)
swrc:pages 101-113 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/HongCKH04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/vlsisp/HongCKH04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp38.html#HongCKH04>
rdfs:seeAlso <https://doi.org/10.1023/B:VLSI.0000040423.95673.2d>
dc:subject low-power multiplier; coefficient optimization; power modeling; power weight factor (xsd:string)
dc:title Power Reduction Technique in Coefficient Multiplications Through Multiplier Characterization. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 38 (xsd:string)