An Efficient VLSI Architecture for Full-Search Block Matching Algorithms.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsisp/LeeL97
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https://dblp.l3s.de/d2r/resource/authors/Mei-Cheng_Lu
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1997
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An Efficient VLSI Architecture for Full-Search Block Matching Algorithms.
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An Efficient VLSI Architecture for Full-Search Block Matching Algorithms.
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