Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsisp/LeeLM08
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/LeeLM08
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Edmund_Lee_0002
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Guy_Lemieux
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shahriar_Mirabbasi
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2Fs11265-007-0141-y
>
foaf:
homepage
<
https://doi.org/10.1007/s11265-007-0141-y
>
dc:
identifier
DBLP journals/vlsisp/LeeLM08
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2Fs11265-007-0141-y
(xsd:string)
dcterms:
issued
2008
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/vlsisp
>
rdfs:
label
Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Edmund_Lee_0002
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Guy_Lemieux
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shahriar_Mirabbasi
>
swrc:
number
1
(xsd:string)
swrc:
pages
57-76
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/LeeLM08/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/vlsisp/LeeLM08
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp51.html#LeeLM08
>
rdfs:
seeAlso
<
https://doi.org/10.1007/s11265-007-0141-y
>
dc:
subject
FPGA; FPGA interconnect; interconnect design; routing design; computer-aided design
(xsd:string)
dc:
title
Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
51
(xsd:string)