A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsisp/LiSLIG08
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A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC.
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CABAC; H.264/AVC; VLSI architecture; codec
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A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC.
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