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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/Lopez-MartinezCEM11>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eduardo_Martos-Naya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eduardo_del_Castillo-S%E2%88%9A%C2%B0nchez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francisco_Javier_L%E2%88%9A%E2%89%A5pez-Mart%E2%88%9A%E2%89%A0nez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_T._Entrambasaguas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs11265-010-0464-y>
foaf:homepage <https://doi.org/10.1007/s11265-010-0464-y>
dc:identifier DBLP journals/vlsisp/Lopez-MartinezCEM11 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs11265-010-0464-y (xsd:string)
dcterms:issued 2011 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/vlsisp>
rdfs:label Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eduardo_Martos-Naya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eduardo_del_Castillo-S%E2%88%9A%C2%B0nchez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francisco_Javier_L%E2%88%9A%E2%89%A5pez-Mart%E2%88%9A%E2%89%A0nez>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_T._Entrambasaguas>
swrc:number 3 (xsd:string)
swrc:pages 319-324 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/Lopez-MartinezCEM11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/vlsisp/Lopez-MartinezCEM11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp62.html#Lopez-MartinezCEM11>
rdfs:seeAlso <https://doi.org/10.1007/s11265-010-0464-y>
dc:title Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 62 (xsd:string)