Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsisp/Lopez-MartinezCEM11
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Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput.
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Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput.
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