Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsisp/MeiSAWKD08
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Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder.
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VLIW; reconfigurable architecture; H.264/AVC decoder; multimedia; FPGA; embedded system
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Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder.
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