Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/vlsisp/NishitaniTHEKK89
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/NishitaniTHEKK89
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hidenobu_Harasaki
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ichiro_Tamitani
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Koichi_Kikuchi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Takao_Nishitani
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Toshiyuki_Kanou
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yukio_Endo
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2FBF00932063
>
foaf:
homepage
<
https://doi.org/10.1007/BF00932063
>
dc:
identifier
DBLP journals/vlsisp/NishitaniTHEKK89
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2FBF00932063
(xsd:string)
dcterms:
issued
1989
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/vlsisp
>
rdfs:
label
Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hidenobu_Harasaki
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ichiro_Tamitani
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Koichi_Kikuchi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Takao_Nishitani
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Toshiyuki_Kanou
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yukio_Endo
>
swrc:
number
1
(xsd:string)
swrc:
pages
25-34
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/NishitaniTHEKK89/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/vlsisp/NishitaniTHEKK89
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp1.html#NishitaniTHEKK89
>
rdfs:
seeAlso
<
https://doi.org/10.1007/BF00932063
>
dc:
title
Parallel video signal processor configuration based on overlap-save technique and its LSI processor element: VISP.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
1
(xsd:string)