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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/RomaS03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Leonel_Sousa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nuno_Roma>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FA%3A1023204620405>
foaf:homepage <https://doi.org/10.1023/A:1023204620405>
dc:identifier DBLP journals/vlsisp/RomaS03 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FA%3A1023204620405 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/vlsisp>
rdfs:label Automatic Synthesis of Motion Estimation Processors Based on a New Class of Hardware Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leonel_Sousa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nuno_Roma>
swrc:number 3 (xsd:string)
swrc:pages 277-290 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/RomaS03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/vlsisp/RomaS03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp34.html#RomaS03>
rdfs:seeAlso <https://doi.org/10.1023/A:1023204620405>
dc:subject motion estimation; block matching; array architectures; specialized processors (xsd:string)
dc:title Automatic Synthesis of Motion Estimation Processors Based on a New Class of Hardware Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 34 (xsd:string)