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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/RuizMB06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Angel_M._Bur%E2%88%9A%E2%89%A5n>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gustavo_A._Ruiz>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Juan_A._Michell>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs11265-006-9764-7>
foaf:homepage <https://doi.org/10.1007/s11265-006-9764-7>
dc:identifier DBLP journals/vlsisp/RuizMB06 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs11265-006-9764-7 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/vlsisp>
rdfs:label High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Angel_M._Bur%E2%88%9A%E2%89%A5n>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gustavo_A._Ruiz>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Juan_A._Michell>
swrc:number 3 (xsd:string)
swrc:pages 161-175 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/RuizMB06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/vlsisp/RuizMB06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp45.html#RuizMB06>
rdfs:seeAlso <https://doi.org/10.1007/s11265-006-9764-7>
dc:subject discrete cosine transform (DCT); inverse discrete cosine transform (IDCT); image compression; row column decomposition; parallel pipelined architectures; very large scale integration (VLSI) (xsd:string)
dc:title High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 45 (xsd:string)