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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/vlsisp/SrinivasP99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hosahalli_R._Srinivas>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Keshab_K._Parhi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FA%3A1008075621962>
foaf:homepage <https://doi.org/10.1023/A:1008075621962>
dc:identifier DBLP journals/vlsisp/SrinivasP99 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FA%3A1008075621962 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/vlsisp>
rdfs:label A Radix 2 Shared Division/Square Root Algorithm and its VLSI Architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hosahalli_R._Srinivas>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Keshab_K._Parhi>
swrc:number 1 (xsd:string)
swrc:pages 37-60 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/vlsisp/SrinivasP99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/vlsisp/SrinivasP99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp21.html#SrinivasP99>
rdfs:seeAlso <https://doi.org/10.1023/A:1008075621962>
dc:title A Radix 2 Shared Division/Square Root Algorithm and its VLSI Architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 21 (xsd:string)