Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Yongtao_Wang>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1007%2Fs11265-008-0323-2>
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dcterms:issued	2010 (xsd:gYear)
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rdfs:label	Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering. (xsd:string)
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dc:title	Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive Filtering. (xsd:string)
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