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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/wpc/DhanabalanS23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gnanasekaran_Dhanabalan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/S._Tamil_Selvi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs11277-022-09990-7>
foaf:homepage <https://doi.org/10.1007/s11277-022-09990-7>
dc:identifier DBLP journals/wpc/DhanabalanS23 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs11277-022-09990-7 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/wpc>
rdfs:label Software Design of VerilogHDL Code Generation for Ladder Diagram and Data Acquisition Using LABVIEW. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gnanasekaran_Dhanabalan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/S._Tamil_Selvi>
swrc:number 2 (xsd:string)
swrc:pages 1087-1115 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/wpc/DhanabalanS23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/wpc/DhanabalanS23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/wpc/wpc128.html#DhanabalanS23>
rdfs:seeAlso <https://doi.org/10.1007/s11277-022-09990-7>
dc:title Software Design of VerilogHDL Code Generation for Ladder Diagram and Data Acquisition Using LABVIEW. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 128 (xsd:string)