Property | Value |
---|---|
dcterms:bibliographicCitation | <http://dblp.uni-trier.de/rec/bibtex/phd/basesearch/Halstead15> |
dc:creator | <https://dblp.l3s.de/d2r/resource/authors/Robert_J._Halstead> |
foaf:homepage | <http://www.escholarship.org/uc/item/45m0d5b0> |
dc:identifier | DBLP phd/basesearch/Halstead15 (xsd:string) |
dcterms:issued | 2015 (xsd:gYear) |
rdfs:label | Using Multithreaded Techniques to Mask Memory Latency on FPGA Accelerators. (xsd:string) |
foaf:maker | <https://dblp.l3s.de/d2r/resource/authors/Robert_J._Halstead> |
dc:publisher | University of California, Riverside, USA (xsd:string) |
owl:sameAs | <http://bibsonomy.org/uri/bibtexkey/phd/basesearch/Halstead15/dblp> |
owl:sameAs | <http://dblp.rkbexplorer.com/id/phd/basesearch/Halstead15> |
rdfs:seeAlso | <http://www.escholarship.org/uc/item/45m0d5b0> |
dc:title | Using Multithreaded Techniques to Mask Memory Latency on FPGA Accelerators. (xsd:string) |
dc:type | <http://purl.org/dc/dcmitype/Text> |
rdf:type | swrc:PhDThesis |
rdf:type | foaf:Document |