Fault emulation: reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/phd/dnb/Maman99>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Reza_Sedaghat-Maman>
foaf:homepage	<https://nbn-resolving.org/urn:nbn:de:gbv:089-3084374462>
dc:identifier	DBLP phd/dnb/Maman99 (xsd:string)
dcterms:issued	1999 (xsd:gYear)
rdfs:label	Fault emulation: reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Reza_Sedaghat-Maman>
swrc:pages	1-113 (xsd:string)
dc:publisher	University of Hanover, Hannover, Germany (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/phd/dnb/Maman99/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/phd/dnb/Maman99>
rdfs:seeAlso	<https://nbn-resolving.org/urn:nbn:de:gbv:089-3084374462>
dc:title	Fault emulation: reconfigurable hardware based fault simulation using logic emulation systems with optimized mapping. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:PhDThesis
rdf:type	foaf:Document