Property | Value |
---|---|
dcterms:bibliographicCitation | <http://dblp.uni-trier.de/rec/bibtex/phd/hal/Cebelieu95> |
dc:creator | <https://dblp.l3s.de/d2r/resource/authors/Marie-Claude_Cebelieu> |
foaf:homepage | <https://tel.archives-ouvertes.fr/tel-00346055> |
dc:identifier | DBLP phd/hal/Cebelieu95 (xsd:string) |
dcterms:issued | 1995 (xsd:gYear) |
rdfs:label | Utilisation de macro blocs en synthèse VHDL. (Macro block handling in VHDL synthesis). (xsd:string) |
foaf:maker | <https://dblp.l3s.de/d2r/resource/authors/Marie-Claude_Cebelieu> |
dc:publisher | Grenoble Institute of Technology, France (xsd:string) |
owl:sameAs | <http://bibsonomy.org/uri/bibtexkey/phd/hal/Cebelieu95/dblp> |
owl:sameAs | <http://dblp.rkbexplorer.com/id/phd/hal/Cebelieu95> |
rdfs:seeAlso | <https://tel.archives-ouvertes.fr/tel-00346055> |
dc:title | Utilisation de macro blocs en synthèse VHDL. (Macro block handling in VHDL synthesis). (xsd:string) |
dc:type | <http://purl.org/dc/dcmitype/Text> |
rdf:type | swrc:PhDThesis |
rdf:type | foaf:Document |