Transforming TLP into DLP with the Dynamic Inter-Thread Vectorization Architecture. (Transformer le TLP en DLP avec l'architecture de vectorization dynamique inter-thread). | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/phd/hal/Kalathingal16>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Sajith_Kalathingal>
foaf:homepage	<https://tel.archives-ouvertes.fr/tel-01426915>
dc:identifier	DBLP phd/hal/Kalathingal16 (xsd:string)
dcterms:issued	2016 (xsd:gYear)
rdfs:label	Transforming TLP into DLP with the Dynamic Inter-Thread Vectorization Architecture. (Transformer le TLP en DLP avec l'architecture de vectorization dynamique inter-thread). (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Sajith_Kalathingal>
dc:publisher	University of Rennes 1, France (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/phd/hal/Kalathingal16/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/phd/hal/Kalathingal16>
rdfs:seeAlso	<https://tel.archives-ouvertes.fr/tel-01426915>
dc:title	Transforming TLP into DLP with the Dynamic Inter-Thread Vectorization Architecture. (Transformer le TLP en DLP avec l'architecture de vectorization dynamique inter-thread). (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:PhDThesis
rdf:type	foaf:Document