![[RDF data]](https://dblp.l3s.de/d2r/snorql/rdf_flyer.24.gif)
| Property | Value |
|---|---|
| dcterms:bibliographicCitation | <http://dblp.uni-trier.de/rec/bibtex/phd/us/Xiang90> |
| dc:creator | <https://dblp.l3s.de/d2r/resource/authors/Xuequn_Xiang> |
| foaf:homepage | <https://hdl.handle.net/2142/20821> |
| dc:identifier | DBLP phd/us/Xiang90 (xsd:string) |
| dcterms:issued | 1990 (xsd:gYear) |
| rdfs:label | Multilevel logic network synthesis system, SYLON-XTRANS and read-only memory minimization procedure, MINROM (xsd:string) |
| foaf:maker | <https://dblp.l3s.de/d2r/resource/authors/Xuequn_Xiang> |
| dc:publisher | University of Illinois Urbana-Champaign, USA (xsd:string) |
| owl:sameAs | <http://bibsonomy.org/uri/bibtexkey/phd/us/Xiang90/dblp> |
| owl:sameAs | <http://dblp.rkbexplorer.com/id/phd/us/Xiang90> |
| rdfs:seeAlso | <https://hdl.handle.net/2142/20821> |
| dc:title | Multilevel logic network synthesis system, SYLON-XTRANS and read-only memory minimization procedure, MINROM (xsd:string) |
| dc:type | <http://purl.org/dc/dcmitype/Text> |
| rdf:type | swrc:PhDThesis |
| rdf:type | foaf:Document |