Decoder Hardware Architecture for HEVC.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/series/icas/TikekarHJSC14
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/series/icas/TikekarHJSC14
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Anantha_P._Chandrakasan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chao-Tsung_Huang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chiraag_Juvekar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mehul_Tikekar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Vivienne_Sze
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2F978-3-319-06895-4%5F10
>
foaf:
homepage
<
https://doi.org/10.1007/978-3-319-06895-4_10
>
dc:
identifier
DBLP series/icas/TikekarHJSC14
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2F978-3-319-06895-4%5F10
(xsd:string)
dcterms:
issued
2014
(xsd:gYear)
rdfs:
label
Decoder Hardware Architecture for HEVC.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Anantha_P._Chandrakasan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chao-Tsung_Huang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chiraag_Juvekar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mehul_Tikekar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Vivienne_Sze
>
swrc:
pages
303-341
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/series/icas/2014SBS
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/series/icas/TikekarHJSC14/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/series/icas/TikekarHJSC14
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/series/icas/SBS2014.html#TikekarHJSC14
>
rdfs:
seeAlso
<
https://doi.org/10.1007/978-3-319-06895-4_10
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/collections/icas
>
dc:
title
Decoder Hardware Architecture for HEVC.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InCollection
rdf:
type
foaf:Document