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dc:identifier DOI doi.org%2F10.1007%2F978-3-540-70812-4%5F16 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Design and Simulation of the Fuzzification Stage through the Xilinx System Generator. (xsd:string)
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swrc:pages 297-305 (xsd:string)
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dc:title Design and Simulation of the Fuzzification Stage through the Xilinx System Generator. (xsd:string)
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