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Publications of "Irith Pomeranz" ( http://dblp.L3S.de/Authors/Irith_Pomeranz )

URL (Homepage):  https://engineering.purdue.edu/ECE/People/profile?resource_id=3028  Author page on DBLP  Author page in RDF  Community of Irith Pomeranz in ASPL-2

Publication years (Num. hits)
1991-1992 (22) 1993 (19) 1994 (16) 1995 (16) 1996 (16) 1997 (19) 1998 (25) 1999 (21) 2000 (24) 2001 (27) 2002 (31) 2003 (36) 2004 (27) 2005 (25) 2006 (26) 2007 (22) 2008 (26) 2009 (24) 2010 (28) 2011 (26) 2012 (22) 2013 (21) 2014 (25) 2015 (22) 2016 (18) 2017 (17)
Publication types (Num. hits)
article(241) inproceedings(360)
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The graphs summarize 299 occurrences of 124 keywords

Results
Found 602 publication records. Showing 601 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Irith Pomeranz Selecting Replacements for Undetectable Path Delay Faults. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Shraddha Bodhe, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Reconstruction of a functional test sequence for increased fault coverage. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Metric for the ability of functional capture cycles to ensure functional operation conditions. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Marco Gaudesi, Irith Pomeranz, Matteo Sonza Reorda, Giovanni Squillero New Techniques to Reduce the Execution Time of Functional Test Programs. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman Test Modification for Reduced Volumes of Fail Data. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Computation of Seeds for LFSR-Based n-Detection Test Generation. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Generation of Transparent-Scan Sequences for Diagnosis of Scan Chain Faults. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Sequential Test Generation Based on Preferred Primary Input Cubes. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Clock Sequences for Increasing the Fault Coverage of Functional Test Sequences. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz LFSR-Based Generation of Multicycle Tests. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Identifying Biases of a Defect Diagnosis Procedure. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Static Compaction by Merging of Seeds for LFSR-Based Test Generation. Search on Bibsonomy ISVLSI The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Naixing Wang, Bo Yao, Xijiang Lin, Irith Pomeranz Functional Broadside Test Generation Using a Commercial ATPG Tool. Search on Bibsonomy ISVLSI The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A bridging fault model for line coverage in the presence of undetected transition faults. Search on Bibsonomy DATE The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Fail data reduction for diagnosis of scan chain faults under transparent-scan. Search on Bibsonomy VTS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Using piecewise-functional broadside tests for functional broadside test compaction. Search on Bibsonomy VTS The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A Test Selection Procedure for Improving the Accuracy of Defect Diagnosis. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Shraddha Bodhe, Enamul Amyeen, Irith Pomeranz, Srikanth Venkataraman Diagnostic Fail Data Minimization Using an N-Cover Algorithm. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Computing Seeds for LFSR-Based Test Generation From Nontest Cubes. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Improving the accuracy of defect diagnosis by adding and removing tests. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Combined input test data volume reduction for mixed broadside and skewed-load test sets. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Static test compaction for circuits with multiple independent scan chains. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz LFSR-Based Generation of Partially-Functional Broadside Tests. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Improving the Accuracy of Defect Diagnosis with Multiple Sets of Candidate Faults. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz N-Detection Test Sets for Circuits with Multiple Independent Scan Chains. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Periodic Scan-In States to Reduce the Input Test Data Volume for Partially Functional Broadside Tests. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Design-for-Testability for Functional Broadside Tests under Primary Input Constraints. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Static Test Compaction for Functional Test Sequences With Restoration of Functional Switching Activity. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Balancing the Numbers of Detected Faults for Improved Test Set Quality. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A Compact Set of Seeds for LFSR-Based Test Generation from a Fully-Specified Compact Test Set. Search on Bibsonomy ISVLSI The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Shraddha Bodhe, M. Enamul Amyeen, Clariza Galendez, Houston Mooers, Irith Pomeranz, Srikanth Venkataraman Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithm. Search on Bibsonomy VTS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A convergent procedure for partially-reachable states. Search on Bibsonomy VTS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz, Sudhakar M. Reddy On the Switching Activity in Faulty Circuits During Test Application. Search on Bibsonomy ATS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1M. Enamul Amyeen, Irith Pomeranz, Srikanth Venkataraman A Joint Diagnostic Test Generation Procedure with Dynamic Test Compaction. Search on Bibsonomy ATS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Test Compaction by Sharing of Functional Test Sequences Among Logic Blocks. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Modeling a Set of Functional Test Sequences as a Single Sequence for Test Compaction. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Skewed-Load Test Cubes Based on Functional Broadside Tests for a Low-Power Test Set. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Static Test Compaction for Low-Power Test Sets by Increasing the Switching Activity. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Use of input necessary assignments for test generation based on merging of test cubes. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Test Vector Omission for Fault Coverage Improvement of Functional Test Sequences. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Piecewise-Functional Broadside Tests Based on Reachable States. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Two-Dimensional Static Test Compaction for Functional Test Sequences. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Enhanced Test Compaction for Multicycle Broadside Tests by Using State Complementation. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A Generalized Definition of Unnecessary Test Vectors in Functional Test Sequences. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz FOLD: Extreme Static Test Compaction by Folding of Functional Test Sequences. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A Multicycle Test Set Based on a Two-Cycle Test Set With Constant Primary Input Vectors. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Computation of Seeds for LFSR-Based Diagnostic Test Generation. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Piecewise-functional broadside tests based on intersections of reachable states. Search on Bibsonomy DFTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Reducing the Storage Requirements of a Set of Functional Test Sequences by Using a Background Sequence. Search on Bibsonomy ISVLSI The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Nitin 0002, Irith Pomeranz, T. N. Vijaykumar FaultHound: value-locality-based soft-fault tolerance. Search on Bibsonomy ISCA The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Generation of close-to-functional broadside tests with equal primary input vectors. Search on Bibsonomy DAC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A definition of the number of detections for faults with single tests in a compact scan-based test set. Search on Bibsonomy VTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Test compaction by test cube merging for four-way bridging faults. Search on Bibsonomy VTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Improving the accuracy of defect diagnosis by considering reduced diagnostic information. Search on Bibsonomy VTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Test vector omission with minimal sets of simulated faults. Search on Bibsonomy VTS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Marco Gaudesi, Matteo Sonza Reorda, Irith Pomeranz On test program compaction. Search on Bibsonomy ETS The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Test Compaction by Sharing of Transparent-Scan Sequences Among Logic Blocks. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Low-Power Diagnostic Test Sets for Transition Faults Based on Functional Broadside Tests. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Low-Power Test Generation by Merging of Functional Broadside Test Cubes. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Restoration-Based Procedures With Set Covering Heuristics for Static Test Compaction of Functional Test Sequences. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Multi-cycle broadside tests with runs of constant primary input vectors. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Reducing the input test data volume under transparent scan. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Sharing Logic for Built-In Generationof Functional Broadside Tests. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Design-for-testability for multi-cycle broadside tests by holding of state variables. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Low-power skewed-load tests based on functional broadside tests. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Static Test Compaction for Scan Circuits by Using Restoration to Modify and Remove Tests. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Functional Broadside Tests for Multistep Defect Diagnosis. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Input Test Data Volume Reduction for Skewed-Load Tests by Additional Shifting of Scan-In States. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Simultaneous Generation of Functional and Low-Power Non-Functional Broadside Tests. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Selection of Functional Test Sequences With Overlaps. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Unknown Output Values of Faulty Circuits and Output Response Compaction. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Improving the Accuracy of Defect Diagnosis by Considering Fewer Tests. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Bo Yao, Irith Pomeranz, Srikanth Venkataraman, Enamul Amyeen Built-in generation of functional broadside tests considering primary input constraints. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz OBO: An Output-by-Output Scoring Algorithm for Fault Diagnosis. Search on Bibsonomy ISVLSI The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz FDPIC: Generation of Functional Test Sequences Based on Fault-Dependent Primary Input Cubes. Search on Bibsonomy ISVLSI The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Substituting transition faults with path delay faults as a basic delay fault model. Search on Bibsonomy DATE The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Test and non-test cubes for diagnostic test generation based on merging of test cubes. Search on Bibsonomy DATE The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Rohit Kapur, Irith Pomeranz Innovative practices session 10C: Advances in DFT and compression. Search on Bibsonomy VTS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz On the use of multi-cycle tests for storage of two-cycle broadside tests. Search on Bibsonomy VTS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Fault simulation with test switching for static test compaction. Search on Bibsonomy VTS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz A distance-based test cube merging procedure for compatible and incompatible test cubes. Search on Bibsonomy ETS The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Diagnostic Test Sets with Increased Switching Activity for Transition Faults. Search on Bibsonomy J. Low Power Electronics The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Transition Fault Simulation Considering Broadside Tests as Partially-Functional Broadside Tests. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Reduced Power Transition Fault Test Sets for Circuits With Independent Scan Chain Modes. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Built-In Generation of Functional Broadside Tests Using a Fixed Hardware Structure. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Broadside and Skewed-Load Tests Under Primary Input Constraints. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Functional Broadside Templates for Low-Power Test Generation. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Computing Two-Pattern Test Cubes for Transition Path Delay Faults. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz On Test Compaction of Broadside and Skewed-Load Test Cubes. Search on Bibsonomy IEEE Trans. VLSI Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Static test compaction for mixed broadside and skewed-load transition fault test sets. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz On multi-cycle test cubes. Search on Bibsonomy IET Computers & Digital Techniques The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz An Adjacent Switching Activity Metric under Functional Broadside Tests. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Signal-Transition Patterns of Functional Broadside Tests. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Low-power test sets under test-related primary input constraints. Search on Bibsonomy IJCCBS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Built-in generation of multicycle functional broadside tests with observation points. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Generation of Functional Broadside Tests for Logic Blocks With Constrained Primary Input Sequences. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Non-Test Cubes for Test Generation Targeting Hard-to-Detect Faults. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Functional Broadside Tests With Incompletely Specified Scan-In States. Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Classes of difficult-to-diagnose transition fault clusters. Search on Bibsonomy DFTS The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
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