Search results for "Micropipelines"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
79	O. A. Petlin, Stephen B. Furber	Scan testing of micropipelines.	VTS	1995	DBLP DOI BibTeX RDF	asynchronous VLSI circuit design, AMULET1 microprocessor, scan test technique, data processing blocks, combinational processing logic, state holding elements, test generation techniques, VLSI, logic testing, delays, integrated circuit testing, design for testability, logic design, asynchronous circuits, fault location, integrated circuit design, microprocessor chips, delay faults, boundary scan testing, computer testing, test patterns, single stuck-at faults, micropipelines
59	O. A. Petlin, Stephen B. Furber	Built-In Self-Testing of Micropipelines.	ASYNC	1997	DBLP DOI BibTeX RDF	Built-in self-test, Design for test, Asynchronous design, Micropipelines
53	Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-Fat Chan	A New Control Circuit for Asynchronous Micropipelines.	IEEE Trans. Computers	2001	DBLP DOI BibTeX RDF	zero-overhead, dual-rail coding, Asynchronous design, micropipeline
53	Chih-Ming Chang, Shih-Lien Lu	Design of a static MIMD data flow processor using micropipelines.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
48	Rajat Subhra Chakraborty, Swarup Bhunia	A study of asynchronous design methodology for robust CMOS-nano hybrid system design.	ACM J. Emerg. Technol. Comput. Syst.	2009	DBLP DOI BibTeX RDF	CMOS-nano co-design, dual-rail circuits, logic degradation, nano-scale crossbar, Asynchronous design, robust design, micropipelines
48	Robert B. Reese, Mitchell A. Thornton, Cherrice Traver	A Coarse-Grain Phased Logic CPU.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	asynchronous, pipelined processor, Automatic synthesis, self-timed, micropipelines
48	Craig Farnsworth, David A. Edwards, Jianwei Liu, Shiv S. Sikand	A hybrid asynchronous system design environment.	ASYNC	1995	DBLP DOI BibTeX RDF	hybrid asynchronous system design environment, hybrid design scheme, asynchronous circuit synthesis, Tangram silicon complier, synchronous design techniques, concurrency, high level synthesis, asynchronous circuits, power reduction, performance gains, micropipelines
42	Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein	Self-Resetting Latches for Asynchronous Micro-Pipelines.	DAC	2007	DBLP DOI BibTeX RDF
32	Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee	Energy-efficient and high performance 2-phase asynchronous micropipelines.	MWSCAS	2017	DBLP DOI BibTeX RDF
32	Haider Alrudainy, Andrey Mokhov, Fei Xia, Alex Yakovlev	Ultra-Low Energy Data Driven Computing Using Asynchronous Micropipelines and Nano-Electro-Mechanical Relays.	ISVLSI	2017	DBLP DOI BibTeX RDF
32	Thomas Polzer, Andreas Steininger	SET propagation in micropipelines.	PATMOS	2013	DBLP DOI BibTeX RDF
32	Antonio Cerone, George J. Milne	A Methodology for the Formal Analysis of Asynchronous Micropipelines.	FMCAD	2000	DBLP DOI BibTeX RDF
32	Jo C. Ebergen, Scott Fairbanks, Ivan E. Sutherland	Predicting Performance of Micropipelines Using Charlie Diagrams.	ASYNC	1998	DBLP DOI BibTeX RDF
32	Stephen B. Furber, Jianwei Liu	Dynamic logic in four-phase micropipelines.	ASYNC	1996	DBLP DOI BibTeX RDF
32	Kees van Berkel 0001, Arjan Bink	Single-track handshake signaling with application to micropipelines and handshake circuits.	ASYNC	1996	DBLP DOI BibTeX RDF
32	Volker Schöber, Thomas Kiel	An Asynchronous Scan Path Concept for Micropipelines using the Bundled Data Convention.	ITC	1996	DBLP DOI BibTeX RDF
32	Shih-Lien Lu	Implementation of micropipelines in enable/disable CMOS differential logic.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
32	Ajay Khoche, Erik Brunvand	Testing micropipelines.	ASYNC	1994	DBLP DOI BibTeX RDF
32	Ivan E. Sutherland	Micropipelines.	Commun. ACM	1989	DBLP DOI BibTeX RDF
27	Steven M. Nowick, Montek Singh	High-Performance Asynchronous Pipelines: An Overview.	IEEE Des. Test Comput.	2011	DBLP DOI BibTeX RDF	elastic circuits, latch controllers, pipelines, asynchronous, dynamic logic, design and test, micropipelines
27	Recep O. Ozdag, Peter A. Beerel	High-Speed QDI Asynchronous Pipelines.	ASYNC	2002	DBLP DOI BibTeX RDF	conditional split, conditional join, QDI, pipelines, asynchronous, dynamic logic, joins, non-linear, fine-grain, micropipelines, forks
21	Raghid Shreih, Maitham Shams	Implementation of asynchronous pipeline circuits in multi-threshold CMOS technologies.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	c-element, gasp, low power, pipeline, asynchronous, multi-threshold
21	Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou	Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
21	Delong Shang, Frank P. Burns, Alexandre V. Bystrov, Albert Koelmans, Danil Sokolov, Alexandre Yakovlev	A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits.	PATMOS	2004	DBLP DOI BibTeX RDF
21	Matthew L. King, Kewal K. Saluja	Testing Micropipelined Asynchronous Circuits.	ITC	2004	DBLP DOI BibTeX RDF
21	Gregg N. Hoyer, Gin Yee, Carl Sechen	Locally clocked pipelines and dynamic logic.	IEEE Trans. Very Large Scale Integr. Syst.	2002	DBLP DOI BibTeX RDF
21	Tony Werner, Venkatesh Akella	An Asynchronous Superscalar Architecture for Exploiting Instruction-Level Parallelism.	ASYNC	2001	DBLP DOI BibTeX RDF
21	Sun-Yen Tan, Stephen B. Furber, Wen-Fang Yen	The Design of an Asynchronous VHDL Synthesizer.	DATE	1998	DBLP DOI BibTeX RDF	Synthesis, VHDL, Asynchronous
21	Stephen B. Furber, Paul Day	Four-phase micropipeline latch control circuits.	IEEE Trans. Very Large Scale Integr. Syst.	1996	DBLP DOI BibTeX RDF