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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ats/ChengJWC00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ching-Hwa_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jinn-Shyan_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shih-Chieh_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wen-Ben_Jone>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FATS.2000.893663>
foaf:homepage <https://doi.org/10.1109/ATS.2000.893663>
dc:identifier DBLP conf/ats/ChengJWC00 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FATS.2000.893663 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
rdfs:label Charge sharing fault analysis and testing for CMOS domino logic circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ching-Hwa_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jinn-Shyan_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shih-Chieh_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wen-Ben_Jone>
swrc:pages 435-440 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ats/2000>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ats/ChengJWC00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ats/ChengJWC00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ats/ats2000.html#ChengJWC00>
rdfs:seeAlso <https://doi.org/10.1109/ATS.2000.893663>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ats>
dc:subject fault diagnosis; CMOS logic circuits; logic testing; delays; logic gates; automatic testing; charge sharing fault analysis; CMOS domino logic circuits; domino logic design; delay; sensitivity measurement; domino gate; test vectors (xsd:string)
dc:title Charge sharing fault analysis and testing for CMOS domino logic circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document