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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vtc/LopacinskiEPBHK18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alireza_Hasani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Goran_Panic>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lukasz_Lopacinski>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marcin_Brzozowski>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohamed_Hussein_Eissa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rolf_Kraemer>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTCSpring.2018.8417522>
foaf:homepage <https://doi.org/10.1109/VTCSpring.2018.8417522>
dc:identifier DBLP conf/vtc/LopacinskiEPBHK18 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTCSpring.2018.8417522 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label Implementation of a Multi-Core Data Link Layer Processor for THz Communication. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alireza_Hasani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Goran_Panic>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lukasz_Lopacinski>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marcin_Brzozowski>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohamed_Hussein_Eissa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rolf_Kraemer>
swrc:pages 1-5 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/vtc/2018s>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/vtc/LopacinskiEPBHK18/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/vtc/vtc2018s.html#LopacinskiEPBHK18>
rdfs:seeAlso <https://doi.org/10.1109/VTCSpring.2018.8417522>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vtc>
dc:title Implementation of a Multi-Core Data Link Layer Processor for THz Communication. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document