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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/vts/NeubauerBRR0018>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bernd_Becker_0001>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jan_Burchard>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jochen_Rivoir>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Matthias_Sauer_0002>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pascal_Raiola>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FVTS.2018.8368645>
foaf:homepage <https://doi.org/10.1109/VTS.2018.8368645>
dc:identifier DBLP conf/vts/NeubauerBRR0018 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FVTS.2018.8368645 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label Efficient generation of parametric test conditions for AMS chips with an interval constraint solver. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jochen_Rivoir>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Matthias_Sauer_0002>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pascal_Raiola>
swrc:pages 1-6 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/VTS.2018.8368645>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/vts>
dc:title Efficient generation of parametric test conditions for AMS chips with an interval constraint solver. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document