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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hldvt/RimonLAJVJJ06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Allon_Adir>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/D._Jani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Itai_Jaeger>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_Vinov>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michal_Rimon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/S._Johnson>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yossi_Lichtenstein>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FHLDVT.2006.319970>
foaf:homepage <https://doi.org/10.1109/HLDVT.2006.319970>
dc:identifier DBLP conf/hldvt/RimonLAJVJJ06 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FHLDVT.2006.319970 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Addressing Test Generation Challenges for Configurable Processor Verification. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Allon_Adir>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/D._Jani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Itai_Jaeger>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_Vinov>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michal_Rimon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/S._Johnson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yossi_Lichtenstein>
swrc:pages 95-101 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hldvt/2006>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hldvt/hldvt2006.html#RimonLAJVJJ06>
rdfs:seeAlso <https://doi.org/10.1109/HLDVT.2006.319970>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hldvt>
dc:title Addressing Test Generation Challenges for Configurable Processor Verification. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document