The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Publications at "DFT"( http://dblp.L3S.de/Venues/DFT )

URL (DBLP): http://dblp.uni-trier.de/db/conf/dft

Publication years (Num. hits)
1993 (44) 1994 (34) 1995 (35) 1996 (40) 1997 (37) 1998 (42) 1999 (46) 2000 (45) 2001 (56) 2002 (46) 2003 (72) 2004 (57) 2005 (67) 2006 (64) 2007 (57) 2008 (64) 2009 (57) 2010 (55) 2011 (57) 2012 (42) 2014 (51) 2016 (32) 2017 (39) 2018 (24)
Publication types (Num. hits)
inproceedings(1139) proceedings(24)
Venues (Conferences, Journals, ...)
DFT(1163)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
The graphs summarize 455 occurrences of 272 keywords

Results
Found 1163 publication records. Showing 1163 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Glenn H. Chapman, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Israel Koren, Zahava Koren Analysis of Single Event Upsets Based on Digital Cameras with Very Small Pixels. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Abhishek Das, Nur A. Touba Efficient Non-Binary Hamming Codes for Limited Magnitude Errors in MLC PCMs. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zois-Gerasimos Tasoulas, Ryan Guss, Iraklis Anagnostopoulos Performance-Based and Aging-Aware Resource Allocation for Concurrent GPU Applications. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Naixing Wang, Irith Pomeranz, Brady Benware, M. EnamulAmyeen, Srikanth Venkataraman Improving the Resolution of Multiple Defect Diagnosis by Removing and Selecting Tests. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Yuta Yamamoto, Kazuteru Namba Construction of Latch Design with Complete Double Node Upset Tolerant Capability Using C-Element. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Irith Pomeranz Postprocessing Procedure for Reducing the Faulty Switching Activity of a Low-Power Test Set. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Zhen Gao, Lina Yan, Jinhua Zhu, Ruishi Han, Pedro Reviriego Analysis of the Effects of Single Event Upsets (SEUs) on User Memory in FPGA Implemented Viterbi Decoders. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Mark Wilkening, Fritz Previlon, David R. Kaeli, Sudhanva Gurumurthi, Steven Raasch, Vilas Sridharan Evaluating the Resilience of Parallel Applications. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Marcello Traiola, Arnaud Virazel, Patrick Girard 0001, Mario Barbareschi, Alberto Bosio Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Gianluca Furano, Antonis Tavoularis, Lucana Santos, Veronique Ferlet-Cavrois, Cesar Boatella, Ruben Garcia Alia, Pablo Fernandez Martinez, Maria Kastriotou, Vanessa Wyrwoll, Salvatore Danzeca, Maris Tali, Dejan Gacnik, Iztok Kramberger, Lars Juul, Konstantinos Maragos, George Lentaris FPGA SEE Test with Ultra-High Energy Heavy Ions. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Elisabeth Baseman, Nathan DeBardeleben, Sean Blanchard, Juston Moore, Olena Tkachenko, Kurt B. Ferreira, Taniya Siddiqua, Vilas Sridharan Physics-Informed Machine Learning for DRAM Error Modeling. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018 Search on Bibsonomy DFT The full citation details ... 2018 DBLP  BibTeX  RDF
1Pilin Junsangsri, Fabrizio Lombardi Multiple Fault Detection in Nano Programmable Logic Arrays. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Nestor E. Evmorfopoulos, George Dimitriou, Georgios I. Stamoulis A Placement-Aware Soft Error Rate Estimation of Combinational Circuits for Multiple Transient Faults in CMOS Technology. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ludovica Bozzoli, Luca Sterpone MATS**: An On-Line Testing Approach for Reconfigurable Embedded Memories. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Semiu A. Olowogemo, William H. Robinson, Daniel B. Limbrick Effects of Voltage and Temperature Variations on the Electrical Masking Capability of Sub-65 nm Combinational Logic Circuits. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Danilo Pellegrini, Marco Ottavi, Eugenio Martinelli, Corrado Di Natale Complementary Resistive Switch Sensing. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Puneet Ramesh Savanur, Spyros Tragoudas Threshold Voltage Extraction Using Static NBTI Aging. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Pavan Kumar Javvaji, Spyros Tragoudas A Method to Model Statistical Path Delays for Accurate Defect Coverage. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Andrea Floridia, Ernesto Sánchez 0001 Hybrid On-Line Self-Test Strategy for Dual-Core Lockstep Processors. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Markus Schutz, Andreas Steininger, Florian Huemer, Jakob Lechner State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Vishal Gupta, Saurabh Khandelwal, Jimson Mathew, Marco Ottavi 45nm Bit-Interleaving Differential 10T Low Leakage FinFET Based SRAM with Column-Wise Write Access Control. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Raoul Velazco A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Lake Bu, Hai Cheng, Michel A. Kinsy Fast Dynamic Device Authentication Based on Lorenz Chaotic Systems. Search on Bibsonomy DFT The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Alexander Schneider, Paul Pop, Jan Madsen Volume management for fault-tolerant continuous-flow microfluidics. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi 0001 Low cost error monitoring for improved maintainability of IoT applications. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Prashant D. Joshi, Arunabha Sen, D. Frank Hsu, Said Hamdioui, Koen Bertels Region based containers - A new paradigm for the analysis of fault tolerant networks. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Mihalis Psarakis, Aitzan Sari A scrubbing scheduling approach for reliable FPGA multicore processors with real-time constraints. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Michiya Kanda, Masaki Hashizume, Hiroyuki Yotsuyanagi, Shyue-Kung Lu A defective level monitor of open defects in 3D ICs with a comparator of offset cancellation type. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Andrea Fedi, Marco Ottavi, Gianluca Furano, Antimo Bruno, Roberto Senesi, Carla Andreani, Carlo Cazzaniga High-energy neutrons characterization of a safety critical computing system. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Amir Mahdi Hosseini Monazzah, Hamed Farbeh, Seyed Ghassem Miremadi Investigating the effects of process variations and system workloads on endurance of non-volatile caches. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Sebastian Huhn 0001, Stephan Eggersglüß, Rolf Drechsler Reconfigurable TAP controllers with embedded compression for large test data volume. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1H. Junqi, T. Nandha Kumar, Haider Abbas, Fabrizio Lombardi Simulation-based evaluation of frequency upscaled operation of exact/approximate ripple carry adders. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jyothish Soman, Timothy M. Jones 0001 High performance fault tolerance through predictive instruction re-execution. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Satyadev Ahlawat, Darshit Vaghani, Virendra Singh Preventing scan-based side-channel attacks through key masking. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Kedar Janardan Dhori, Hitesh Chawla, Ashish Kumar, Prashant Pandey, Promod Kumar, Lorenzo Ciampolini, Florian Cacho, Damien Croain High-yield design of high-density SRAM for low-voltage and low-leakage operations. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel Scheduling voter checks to detect configuration memory errors in FPGA-based TMR systems. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Jain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho Design-for-testability for paper-based digital microfluidic biochips. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Toshinori Hosokawa, Atsushi Hirai, Hiroshi Yamazaki, Masayuki Arai A dynamic test compaction method on low power test generation based on capture safe test vectors. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1R. Cantora, E. Sanchez, Matteo Sonza Reorda, Giovanni Squillero, E. Valea On the optimization of SBST test program compaction. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Xin Fan, Jan Stuijt, Tobias Gemmeke Towards SRAM leakage power minimization by aggressive standby voltage scaling - Experiments on 40nm test chips. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Lake Bu, Hien D. Nguyen, Michel A. Kinsy RASSS: A perfidy-aware protocol for designing trustworthy distributed systems. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Taniya Siddiqua, Vilas Sridharan, Steven E. Raasch, Nathan DeBardeleben, Kurt B. Ferreira, Scott Levy, Elisabeth Baseman, Qiang Guan Lifetime memory reliability data from the field. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Lucas Weigel, Fernando Fernandes, Philippe O. A. Navaux, Paolo Rech Kernel vulnerability factor and efficient hardening for histogram of oriented gradients. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Chiara Sandionigi, Mauricio Altieri, Olivier Héron Early estimation of aging in the design flow of integrated circuits through a programmable hardware module. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Glenn H. Chapman, Parham Purbakht, Peter Le, Israel Koren, Zahava Koren Exploring soft errors (SEUs) with digital imager pixels ranging from 7 to 1.3 μm. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Leandro Santiago, Vinay C. Patil, Charles B. Prado, Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Sandip Kundu Realizing strong PUF from weak PUF via neural computing. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Alessandro Baldassari, Cristiana Bolchini, Antonio Miele A dynamic reliability management framework for heterogeneous multicore systems. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Bing Li 0005, Ulf Schlichtmann Reliability-aware synthesis and fault test of fully programmable valve arrays (FPVAs). Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Harshad Dhotre, Stephan Eggersglüß, Mehdi Dehbashi, Ulrike Pfannkuchen, Rolf Drechsler Machine learning based test pattern analysis for localizing critical power activity areas. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Tiago A. O. Alves, Sandip Kundu, Leandro A. J. Marzulo, Felipe M. G. França A resilient scheduler for dataflow execution. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Yu-Wei Lee, Nur A. Touba Improving test compression with multiple-polynomial LFSRs. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Vasileios Tenentes, Charles Leech, Graeme M. Bragg, Geoff V. Merrett, Bashir M. Al-Hashimi, Hussam Amrouch, Jörg Henkel, Shidhartha Das Hardware and software innovations in energy-efficient system-reliability monitoring. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Haider Alrudainy, Rishad A. Shafik, Andrey Mokhov, Alex Yakovlev Lifetime reliability characterization of N/MEMS used in power gating of digital integrated circuits. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Frank Sill Torres, Pedro Fausto Rodrigues Leite, Rolf Drechsler Unintrusive aging analysis based on offline learning. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Yu Xie, Chen Yang 0003, Chuang-An Mao, He Chen, Yizhuang Xie A novel low-overhead fault tolerant parallel-pipelined FFT design. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017, Cambridge, United Kingdom, October 23-25, 2017 Search on Bibsonomy DFT The full citation details ... 2017 DBLP  BibTeX  RDF
1Mert Atamaner, Oguz Ergin, Marco Ottavi, Pedro Reviriego Detecting errors in instructions with bloom filters. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Sina Boroumand, Hadi Parandeh-Afshar, Philip Brisk, Siamak Mohammadi CAL: Exploring cost, accuracy, and latency in approximate and speculative adder design. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Shoba Gopalakrishnan, Virendra Singh REMORA: A hybrid low-cost soft-error reliable fault tolerant architecture. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Pai-Shun Ting, John P. Hayes Eliminating a hidden error source in stochastic circuits. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1V. Gokulkrishnan, V. Kamakoti, Nitin Chandrachoodan, Seetal Potluri A scalable pseudo-exhaustive search for fault diagnosis in microfluidic biochips. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Marco Restifo, Paolo Bernardi, S. De Luca, Alessandro Sansonetti On-line software-based self-test for ECC of embedded RAM memories. Search on Bibsonomy DFT The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Juman Alshraiedeh, Avinash Kodi An adaptive routing algorithm to improve lifetime reliability in NoCs architecture. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Alexander Schöll, Claus Braun, Hans-Joachim Wunderlich Applying efficient fault tolerance to enable the preconditioned conjugate gradient solver on approximate computing hardware. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Naghmeh Karimi, Ke Huang Prognosis of NBTI aging using a machine learning scheme. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Abdulaziz Eker, Oguz Ergin Error recovery through partial value similarity. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Vinay C. Patil, Arunkumar Vijayakumar, Sandip Kundu On meta-obfuscation of physical layouts to conceal design characteristics. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Gianluca Furano, Stefano Di Mascio, Tomasz Szewczyk, Alessandra Menicucci, Luigi Campajola, Francesco Di Capua, Andrea Fabbri, Marco Ottavi A novel method for SEE validation of complex SoCs using Low-Energy Proton beams. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Anirudh Iyengar, Swaroop Ghosh, Nitin Rathi, Helia Naeimi Side channel attacks on STTRAM and low-overhead countermeasures. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar 0001 Cross-layer fault-tolerant design of real-time systems. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Zaid Al-bayati, Brett H. Meyer, Haibo Zeng Fault-tolerant scheduling of multicore mixed-criticality systems under permanent failures. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Chao Chen, Jacopo Panerati, Giovanni Beltrame Effects of online fault detection mechanisms on Probabilistic Timing Analysis. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Omer Khan, Maria K. Michael, Antonio Miele, Qiaoyan Yu Foreword. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Xabier Iturbe, Balaji Venu, Emre Ozer Soft error vulnerability assessment of the real-time safety-related ARM Cortex-R5 CPU. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Mojing Liu, Brett H. Meyer Bounding error detection latency in safety critical systems with enhanced Execution Fingerprinting. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Marcos T. Leipnitz, Eduardo Nunes de Souza, Gabriel L. Nazar Low cost resilient regular expression matching on FPGAs. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Ronak Salamat, Masoumeh Ebrahimi, Nader Bagherzadeh, Freek Verbeek CoBRA: Low cost compensation of TSV failures in 3D-NoC. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Xiaotong Cui, Kaijie Wu 0001, Siddharth Garg, Ramesh Karri Can flexible, domain specific programmable logic prevent IP theft? Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Luca Santinelli, Zhishan Guo, Laurent George 0001 Fault-aware sensitivity analysis for probabilistic real-time systems. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Glenn H. Chapman, Rahul Thomas, Rohan Thomas, Israel Koren, Zahava Koren Experimental study and analysis of soft and permanent errors in digital cameras. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Hananeh Aliee, Stefan Vitzethum, Michael Glaß, Jürgen Teich, Emanuele Borgonovo Guiding Genetic Algorithms using importance measures for reliable design of embedded systems. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Ke Chen, Fabrizio Lombardi, Jie Han 0001 Design and analysis of an approximate 2D convolver. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Filippo Giuliani, Marco Ottavi, Gian-Carlo Cardarilli, Marco Re, Luca Di Nunzio, Rocco Fazzolari, Antimo Bruno, Francesco Zuliani Design and characterization of a high-safety hardware/software module for the acquisition of Eurobalise telegrams. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Hassan Ebrahimi, Alireza Rohani, Hans G. Kerkhoff Detecting intermittent resistive faults in digital CMOS circuits. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Adam Watkins, Spyros Tragoudas A Highly Robust Double Node Upset Tolerant latch. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016, Storrs, CT, USA, September 19-20, 2016 Search on Bibsonomy DFT The full citation details ... 2016 DBLP  BibTeX  RDF
1Juexiao Su, Ju-Yueh Lee, Chang Wu, Lei He In-place LUT polarity inVersion to mitigate soft errors for FPGAs. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Hardeep Chahal, Vasileios Tenentes, Daniele Rossi 0001, Bashir M. Al-Hashimi BTI aware thermal management for reliable DVFS designs. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Riccardo Cantoro, Davide Piumatti, Paolo Bernardi, Sergio de Luca, Alessandro Sansonetti In-field functional test programs development flow for embedded FPUs. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Cristiana Bolchini, Matteo Carminati, Tulika Mitra, Thannirmalai Somu Muthukaruppan Combined on-line lifetime-energy optimization for asymmetric multicores. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Hiroki Ueno, Kazuteru Namba Construction of a soft error (SEU) hardened Latch with high critical charge. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Xiaolin Xu, Daniel E. Holcomb Reliable PUF design using failure patterns from time-controlled power gating. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Amir Charif, Nacer-Eddine Zergainoh, Michael Nicolaidis A new approach to deadlock-free fully adaptive routing for high-performance fault-tolerant NoCs. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Ahmed Ibrahim, Hans G. Kerkhoff Efficient utilization of hierarchical iJTAG networks for interrupts management. Search on Bibsonomy DFT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
1Chuanlei Zheng, Shuai Wang 0006 Characterizing soft error vulnerability of cache coherence protocols for chip-multiprocessors. Search on Bibsonomy DFT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Domenico G. Sorrenti, Dario Cozzi, Sebastian Korf, Luca Cassano, Jens Hagemeyer, Mario Porrmann, Cinzia Bernardeschi Exploiting dynamic partial reconfiguration for on-line on-demand testing of permanent faults in reconfigurable systems. Search on Bibsonomy DFT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Bahareh J. Farahani, Saeed Safari An instance-based SER analysis in the presence of PVTA variations. Search on Bibsonomy DFT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Md. Tauhidur Rahman, Domenic Forte, Quihang Shi, Gustavo K. Contreras, Mark Mohammad Tehranipoor CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly. Search on Bibsonomy DFT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Florian Haas, Sebastian Weis, Stefan Metzlaff, Theo Ungerer Exploiting Intel TSX for fault-tolerant execution in safety-critical systems. Search on Bibsonomy DFT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
Displaying result #1 - #100 of 1163 (100 per page; Change: )
Pages: [1][2][3][4][5][6][7][8][9][10][>>]
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license